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- {7
- ************************************
- * }2The 68000 Instruction Set{7 *
- ************************************
-
- {3If you are interested in programming
- in assembler then it would be a good
- idea to learn the instruction set !!{7
-
- {7ABCD {6Srce,Dest - {3Add 2 BCD nums
- {7ADD {6Srce,Dest - {3Binary addition
- {7ADDA {6Srce,An - {3Add to address reg
- {7ADDI {6#n,ea - {3Add with constant
- {7ADDQ {6#n,ea - {3Add using bits 0-7
- {7ADDX {6Srce,Dest - {3Add ; transfer to X
- {7AND {6Srce,Dest - {3Logical AND
- {7ANDI {6#n,ea - {3AND with constant
- {7ASL {6#n,ea - {3Maths shift left
- {7ASR {6#n,ea - {3Maths shift right
- {7Bcc {6Label - {3Branch on condition
- {7BCHG {6#n,ea - {3Change bit
- {7BCLR {6#n,ea - {3Clear bit
- {7BRA {6Label - {3Branch to label
- {7BSET {6#n,ea - {3Bit set
- {7BSR {6Label - {3Branch to routine
- {7BTST {6#n,ea - {3Test bit > Z flag
- {7CHK {6ea,Dx - {3Check data register
- {7CLR {6ea - {3Clear an operand
- {7CMP {6Srce,Dest - {3Compare operands
- {7CMPA {6ea,An - {3Compare address reg
- {7CMPI {6#n,ea - {3Compare constant
- {7CMPM {6Srce,Dest - {3Compare in memory
- {7DBcc {6Reg,Label - {3-1 then branch
- {7DIVS {6Srce,Dest - {332 bit div to 16
- {7DIVU {6Srce,Dest - {3As above less sign
- {7EOR {6Srce,Dest - {3Exclusive OR
- {7EORI {6#n,ea - {3EOR with constant
- {7EXG {6Rn,Rn - {3Exchange 2 regs
- {7EXT {6Dn - {3Extension to 32 bit
- {7JMP {6Label - {3Jump
- {7JSR {6Label - {3Jump to routine
- {7LEA {6ea,An - {3Address into A-reg
- {7LINK {6An,#n - {3Build stack area
- {7LSL {6#n,ea - {3Logical shift left
- {7LSR {6#n,ea - {3Logical shift right
- {7MOVE {6Srce,Dest - {3Transfer S -> D
- {7MOVE {6SR,ea - {3Transfer SR content
- {7MOVE {6ea,SR - {3Transfer SR content
- {7MOVE {6ea,CCR - {3Load flags
- {7MOVE {6USP,ea - {3Trnasfer user SP
- {7MOVE {6ea,USP - {3Transfer user SP
- {7MOVEA {6ea,An - {3Transfer to A-reg
- {7MOVEM {6Regs,ea - {3Transfer many regs
- {7MOVEM {6ea,Regs - {3Transfer many regs
- {7MOVEP {6Srce,Dest - {3Transfer to device
- {7MOVEQ {6#n,Dn - {3Quick trans 8 bits
- {7MULS {6Srce,Dest - {316 bit mul to 32
- {7MULU {6Srce,Dest - {3As above less sign
- {7NBCD {6Srce,Dest - {3Negate BCD number
- {7NEG {6ea - {3Negate number
- {7NEGX {6ea - {3Negate with trans
- {7NOP {6 - {3No operation
- {7NOT {6ea - {3Invert operand
- {7OR {6Srce,Dest - {3Logical OR
- {7ORI {6#n,ea - {3OR with constant
- {7PEA {6ea - {3Address -> Stack
- {7RESET {6 - {3Reset devices
- {7ROL {6#n,ea - {3Rotate left
- {7ROR {6#n,ea - {3Rotate right
- {7ROXL {6#n,ea - {3Rotate left -> X
- {7ROXR {6#n,ea - {3Rotate right -> X
- {7RTE {6 - {3Return from except
- {7RTR {6 - {3Return; load flags
- {7RTS {6 - {3Return from routine
- {7SBCD {6Srce,Dest - {3Sub 2 BCD numbers
- {7Scc {6ea - {3Set to -1 if true
- {7STOP {6 - {3Stop work
- {7SUB {6Srce,Dest - {3Binary subtraction
- {7SUBA {6ea,An - {3Subtract from A-reg
- {7SUBI {6#n,ea - {3Subtract constant
- {7SUBQ {6#n,ea - {3Fast sub of 3 bits
- {7SUBX {6Srce,Dest - {3Sub; trans to X
- {7SWAP {6Dn - {3Swap halves of reg
- {7TAS {6ea - {3Test + set bit 7
- {7TRAP {6#n - {3Jump to exception
- {7TRAPV {6 - {3Check overflow+ TST
-
- {1(As this is the first time I've seen
- this, I assume Spud put it in!
- Cheers mate! I hope people find it
- useful - don't forget SR has a print
- option!! -Ed)
-
- {7UNLK {6An - {3Un-link stack area